The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2022
Filed:
Jun. 28, 2018
Applicant:
Shenzhen Chipuller Chip Technology Co., Ltd, Shenzhen, CN;
Inventors:
Meng Yan, Mountain View, CA (US);
Omar Mahmoud Adfal Alnagger, Mountain View, CA (US);
Myron O. Shak, Mountain View, CA (US);
Soheil Gharahi, Mountain View, CA (US);
Assignee:
Shenzhen Chipuller Chip Technology Co., LTD, Shenzhen, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/177 (2020.01); H03K 19/17736 (2020.01); H03H 11/02 (2006.01); H04L 49/109 (2022.01);
U.S. Cl.
CPC ...
H03K 19/17736 (2013.01); H03H 11/02 (2013.01); H04L 49/109 (2013.01);
Abstract
Described are concepts related to the field of programmable interconnect substrates used in packaging electronics, and to stacked integrated circuits produced for application in low power and small form factor designs with fast prototyping and short mass-production cycle times. The concepts facilitate the dynamic reconfiguration of routing resources in the presence of an active system, and the tuning of routing paths to meet power and performance metrics.