The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Dec. 05, 2007
Applicants:

Franz Padinger, St. Marien, AT;

Klaus Schröter, Berlin, DE;

Inventors:

Franz Padinger, St. Marien, AT;

Klaus Schröter, Berlin, DE;

Assignee:

ASMAG—Holding GmbH, Gruenau im Almtal, AT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0224 (2006.01);
U.S. Cl.
CPC ...
H01L 31/022433 (2013.01); H01L 2924/0002 (2013.01); Y02E 10/50 (2013.01);
Abstract

The invention relates to a layered structure () with semiconducting materials on a support layer () comprising at least one planar semiconducting layer () and several electrodes, in particular a first () and second () one. The semiconducting layer () has a top () and bottom () flat face extending essentially parallel and spaced apart from one another by the height of the layer (). The semiconducting layer () is also applied by the bottom flat face () to a flat face of the support layer () and the two electrodes are connected to the semiconducting layer in an electrically conducting manner. The at least two electrodes are applied by means of a structuring process and are disposed on two oppositely lying faces of the semiconducting layer and/or in planes at least approximately parallel between the two faces.


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