The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2022
Filed:
Jun. 12, 2019
Samsung Electronics Co., Ltd., Suwon-si, KR;
Joo Hee Jang, Hwaseong-si, KR;
Seok Ho Kim, Hwaseong-si, KR;
Hoon Joo Na, Hwaseong-si, KR;
Kwang Jin Moon, Hwaseong-si, KR;
Jae Hyung Park, Hwaseong-si, KR;
Kyu Ha Lee, Hwaseong-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A method for wafer planarization includes forming a second insulating layer and a polishing layer on a substrate having a chip region and a scribe lane region; forming a first through-hole in the polishing layer in the chip region and the scribe lane region and a second through-hole in the second insulating layer in the chip region, wherein the second through-hole and the first through-hole meet in the chip region; forming a pad metal layer inside the first through-hole and the second through-hole and on an upper surface of the polishing layer; and polishing the polishing layer and the pad metal layer by a chemical mechanical polishing (CMP) process to expose an upper surface of the second insulating layer in the chip region and the scribe lane region.