The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2022

Filed:

Dec. 11, 2019
Applicant:

Hamilton Sundstrand Corporation, Charlotte, NC (US);

Inventors:

Ashish Vijay, Rajasthan, IN;

Sesh Mohan Rao, Karnataka, IN;

Rajeeva Gopala Krishna, Karnataka, IN;

Shardul Shrinivas Bapat, Karnataka, IN;

Rajagopal Srinivasan, Karnataka, IN;

Manish Kumar, Karnataka, IN;

Assignee:

HAMILTON SUNDSTRAND CORPORATION, Charlotte, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/331 (2020.01); G06F 11/27 (2006.01); G06F 13/40 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 30/331 (2020.01); G06F 11/27 (2013.01); G06F 13/4022 (2013.01); G06F 2213/0038 (2013.01);
Abstract

A system for controlling a motor with a plurality of motor control functions including at least a current control loop and a velocity control loop. The system includes one of a hybrid Digital Signal Processor (DSP)-Field Programmable Gate Array (FPGA) architecture having an integral DSP and an integral FPGA or a System on a Chip (SoC) architecture having a Microcontroller Sub-System (MSS) and an FPGA fabric. The current control loop function is assigned to the integral FPGA for the hybrid DSP-FPGA architecture, and at least the velocity control loop function is assigned to the DSP the hybrid DSP-FPGA architecture. Alternatively, the current control loop function is assigned the FPGA fabric of the SoC architecture, and at least the velocity control loop function is assigned to the MSS of the SoC architecture.


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