The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Mar. 09, 2020
Applicant:

Tdk Corporation, Tokyo, JP;

Inventors:

Takaaki Morita, Tokyo, JP;

Seiichi Tajima, Tokyo, JP;

Takashi Kariya, Tokyo, JP;

Assignee:

TDK CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01); H05K 1/18 (2006.01); H05K 3/20 (2006.01); H01L 23/64 (2006.01); H01L 23/66 (2006.01); H01L 23/495 (2006.01); H01L 23/522 (2006.01); H01F 27/24 (2006.01); H01F 27/28 (2006.01); H01F 27/29 (2006.01); H01F 27/32 (2006.01); H05K 3/46 (2006.01); H05K 1/11 (2006.01); H05K 3/10 (2006.01); H05K 1/03 (2006.01);
U.S. Cl.
CPC ...
H05K 3/4644 (2013.01); H05K 1/0353 (2013.01); H05K 1/115 (2013.01); H05K 1/185 (2013.01); H05K 3/10 (2013.01); H05K 2201/015 (2013.01); H05K 2201/0141 (2013.01);
Abstract

A device-embedded board includes a board main body, conductor wiring layers formed inside or on a surface of the board main body, and device formation layers formed inside the board main body so as to be in contact with a portion of the conductor wiring layers. The device formation layer is configured in an insulating region in which functional filler for forming a devices is dispersed.


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