The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Mar. 23, 2018
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Takatoshi Kameshima, Kanagawa, JP;

Hideto Hashiguchi, Kanagawa, JP;

Ikue Mitsuhashi, Kanagawa, JP;

Hiroshi Horikoshi, Tokyo, JP;

Reijiroh Shohji, Tokyo, JP;

Minoru Ishida, Tokyo, JP;

Tadashi Iijima, Kanagawa, JP;

Masaki Haneda, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 23/64 (2006.01); H01L 25/065 (2006.01); H01L 21/822 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 23/642 (2013.01); H01L 27/14634 (2013.01); H01L 21/8221 (2013.01); H01L 25/0657 (2013.01); H01L 27/0688 (2013.01);
Abstract

A solid-state imaging device includes a first substrate including a first semiconductor substrate and a first multi-layered wiring layer stacked on the first semiconductor substrate, a second substrate including a second semiconductor substrate and a second multi-layered wiring layer stacked on the second semiconductor substrate, a third substrate including a third semiconductor substrate and a third multi-layered wiring layer stacked on the third semiconductor substrate, and a first coupling structure for electrically coupling the first substrate and the second substrate. The first substrate, the second substrate, and the third substrate are stacked in this order. The first substrate and the second substrate are bonded together such that the first multi-layered wiring layer and the second multi-layered wiring layer are opposed to each other. The first substrate excludes a coupling structure formed from the first substrate as a base over bonding surfaces of the first substrate and the second substrate.


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