The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Apr. 16, 2021
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventors:

Yu-Ting Lin, New Taipei, TW;

Pei-Jhen Wu, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10855 (2013.01); H01L 27/10814 (2013.01);
Abstract

The present disclosure provides a manufacturing method of a memory structure. The manufacturing method includes the operations of: receiving a substrate; forming a landing pad layer in the substrate; forming trenches over the landing pad layer; and forming a top pad over the trenches to form the capacitor array. The operation of forming the trenches over the landing pad layer includes the operations of: forming an integrated layer having an array pattern over the landing pad layer; forming, by a chop mask, a masking layer to mask an edge portion of the array pattern so as to define a rectangle portion of the array pattern; and etching the integrated layer according to the rectangle portion of the array pattern to form the plurality of trenches. The edge portion of the array pattern surrounds the rectangle portion of the array pattern.


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