The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Dec. 30, 2021
Applicant:

China Flash Co., Ltd., Shanghai, CN;

Inventors:

Hong Nie, Shanghai, CN;

Zeyu Zhu, Shanghai, CN;

Yue Zhao, Shanghai, CN;

Ying Sun, Shanghai, CN;

Assignee:

CHINA FLASH CO., LTD., Shanghai, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/00 (2006.01); G11C 16/34 (2006.01); G11C 16/14 (2006.01); G11C 16/10 (2006.01); H03K 19/0948 (2006.01); G11C 16/08 (2006.01); G11C 16/30 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3409 (2013.01); G11C 16/0433 (2013.01); G11C 16/08 (2013.01); G11C 16/102 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/344 (2013.01); H03K 19/0948 (2013.01);
Abstract

A word line decoding circuit and memory comprises a first address decoding module to obtain word line logic signals; a word line pre-coding module to obtain word line pre-coding signals and first switch signals; a second address decoding module to obtain first and second selection signals; a third address decoding module to obtain third selection signals; a first level conversion module which performs level conversion on the first selection signals to obtain first and second control signals; a second level conversion module which performs level conversion on the second selection signals to get third and fourth control signals; a third level conversion module which performs level conversion on the third selection signals to obtain fifth control signals; a word line toggle switch signal generation module which generates second switch signals based on each control signal; and a word line toggle module to generate word line signals.


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