The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Jun. 21, 2019
Applicant:

Degirum Corporation, Campbell, CA (US);

Inventors:

Kit S. Tam, Menlo Park, CA (US);

Shashi Kiran Chilappagari, San Jose, CA (US);

Assignee:

DeGirum Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G06N 3/08 (2006.01); G06F 16/31 (2019.01); G06F 40/30 (2020.01);
U.S. Cl.
CPC ...
G06N 3/08 (2013.01); G06F 17/16 (2013.01); G06F 16/31 (2019.01); G06F 40/30 (2020.01);
Abstract

A computer system for performing negative sampling, including a processor chip having a plurality of on-chip memory banks, a plurality of on-chip compute engines and a memory interface, wherein the on-chip memory banks include memory blocks that store corresponding sets of 'likely to be updated' word vectors, a memory block that stores a subset of 'less likely to be updated' word vectors and a noise sample cache that stores a subset of negative samples. An external memory is coupled to the memory interface, and stores a set of ‘less likely to be updated’ word vectors and a set of negative samples. The on-chip compute engines include a refresh thread, which accesses the set of negative samples in the external memory to provide the subset of negative samples stored in the noise sample cache on the processor chip, such that these negative samples can be readily accessed on the processor chip.


Find Patent Forward Citations

Loading…