The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Mar. 06, 2020
Applicant:

Nvidia Corp., Santa Clara, CA (US);

Inventors:

Michael Sullivan, Austin, TX (US);

Siva Hari, Sunnyvale, CA (US);

Brian Zimmer, Palo Alto, CA (US);

Timothy Tsai, Santa Clara, CA (US);

Stephen W. Keckler, Austin, TX (US);

Assignee:

NVIDIA Corp., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 9/30 (2018.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/102 (2013.01); G06F 9/30029 (2013.01); G06F 9/30116 (2013.01); G06F 11/0772 (2013.01); G06F 11/1044 (2013.01);
Abstract

An error reporting system utilizes a parity checker to receive data results from execution of an original instruction and a parity bit for the data. A decoder receives an error correcting code (ECC) for data resulting from execution of a shadow instruction of the original instruction, and data error correction is initiated on the original instruction result on condition of a mismatch between the parity bit and the original instruction result, and the decoder asserting a correctable error in the original instruction result.


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