The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2022

Filed:

Oct. 04, 2019
Applicant:

Zaram Technology Co., Ltd., Seongnam-si, KR;

Inventors:

Tae Jong Lee, Seongnam-si, KR;

Sung Hoon Park, Yongin-si, KR;

In Shik Seo, Seoul, KR;

Joon Hyun Baek, Seongnam-si, KR;

Assignee:

ZARAM TECHNOLOGY CO., LTD., Seongnam-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 1/08 (2006.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 1/08 (2013.01); G06F 9/30079 (2013.01); G06F 9/3802 (2013.01); G06F 9/3822 (2013.01);
Abstract

The present invention relates to a hardware high-speed computation combined RISC-V based computation device for supporting a user-defined instruction set and a method thereof which configures a hardware high-speed computation unit executing a user-defined function through a field programmable gate array (FPGA) in a single chip together with a RISC-V based computation device, executes general computation and user-defined computation in an instruction level, not a separate bus connection configuration, through a program using a RISC-V based instruction set including a user-defined instruction set, and provides flexibility capable of optionally changing the user-defined instruction set and a corresponding function and a method thereof.


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