The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Nov. 28, 2018
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventor:

Masaaki Bairo, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/378 (2011.01); H01L 27/146 (2006.01); H04N 5/357 (2011.01); H04N 5/374 (2011.01); H04M 1/02 (2006.01); H04N 5/225 (2006.01);
U.S. Cl.
CPC ...
H04N 5/378 (2013.01); H01L 27/14605 (2013.01); H01L 27/14612 (2013.01); H01L 27/14643 (2013.01); H04N 5/357 (2013.01); H04N 5/374 (2013.01);
Abstract

A solid-state imaging element of the present disclosure includes: a pixel array in which a plurality of unit pixels is arranged in a matrix shape, the plurality of unit pixels each including a photoelectric conversion unit; and an analog-to-digital conversion unit that converts an analog pixel signal into a digital signal, the analog pixel signal being output from each of the plurality of unit pixels of the pixel array. Then, the analog-to-digital conversion unit includes a comparator that includes a differential input unit and an active load of the differential input unit, the differential input unit using, as an input, a prescribed reference signal and the analog pixel signal. At least one transistor that configures the active load includes a plurality of control terminals that controls current. The plurality of control terminals is electrically connected in common.


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