The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Jun. 05, 2018
Applicant:

Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;

Inventors:

Asad Jafri, Malmö, SE;

Jessica Chani, Malmö, SE;

Kristian Eklund, Dalby, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/32 (2006.01); H04B 1/04 (2006.01); H04L 27/36 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3247 (2013.01); H03F 1/3252 (2013.01); H03F 1/3258 (2013.01); H04B 1/04 (2013.01); H04B 1/0475 (2013.01); H04L 27/368 (2013.01); H03F 2201/3209 (2013.01); H03F 2201/3212 (2013.01); H03F 2201/3224 (2013.01); H03F 2201/3233 (2013.01); H04B 2001/0425 (2013.01);
Abstract

Systems and methods are disclosed herein for providing efficient Digital Predistortion (DPD). In some embodiments, a system comprises a DPD system comprising a DPD actuator. The DPD actuator comprises a Look-Up Table (LUT), selection circuitry, and an approximate multiplication function. Each LUT entry comprises information that represents a first set of values {p, p, . . . , p} and a second set of values {s, s, . . . , s} that represent a LUT value of s·2+s·2+ . . . +s·2where each value s∈{+1,−1} where k≥2. The selection circuitry is operable to, for each input sample of an input signal, select a LUT entry based on a value derived from the input sample that is indicative of a power of the input signal. The approximate multiplication function comprises shifting and combining circuitry that operates to, for each input sample, shift and combine bits that form a binary representation of the input sample in accordance with {p, p, . . . , p} and {s, s, . . . , s} to provide an output sample.


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