The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Jul. 02, 2020
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Dae Sung Eom, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11565 (2017.01); H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 27/11519 (2017.01); H01L 27/11582 (2017.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11565 (2013.01); H01L 21/76224 (2013.01); H01L 27/11519 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/0649 (2013.01);
Abstract

A semiconductor device includes: a stacked structure comprising a plurality of dielectric layers and a plurality of conductive layers, wherein the dielectric layers are alternately stacked with the conductive layers; a groove formed for each conductive layer by recessing the conductive layer to the inside of the stacked structure; and an isolation structure formed through the stacked structure so as to isolate the stacked structure into a first block and a second block. The isolation structure comprises a first isolation structure and a second isolation structure adjacent to the first isolation structure with a gap provided between the first and second isolation structures, and one end of the first isolation structure and the other end of the second isolation structure, which face each other, have a vortex shape when viewed from above.


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