The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2022
Filed:
Apr. 13, 2021
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Charles Neumann, Lake Forest, CA (US);
Robert P. Ryan, Mission Viejo, CA (US);
Assignee:
Western Digital Technologies, Inc., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 1/3296 (2019.01); G06F 13/42 (2006.01); H01R 31/06 (2006.01); G06F 1/3225 (2019.01); G06F 1/28 (2006.01); H01R 24/62 (2011.01); H01R 107/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G06F 1/28 (2013.01); G06F 1/3225 (2013.01); G06F 1/3296 (2013.01); H01R 31/065 (2013.01); G06F 2213/0042 (2013.01); H01R 24/62 (2013.01); H01R 2107/00 (2013.01); H01R 2201/06 (2013.01);
Abstract
A method and apparatus are provided to receive a voltage at a first value at a voltage reducing adaptor, ascertain a voltage supply requirement for the memory arrangement to obtain and ascertained voltage supply requirement, reduce the voltage from the first value to the ascertained voltage supply requirement within the adaptor and supply the voltage at the ascertained voltage supply requirement to the memory arrangement.