The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Dec. 05, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Steven J. Battle, Austin, TX (US);

Khandker Nabil Adeeb, Travis, TX (US);

Brian D. Barrick, Pflugerville, TX (US);

Joshua W. Bowman, Austin, TX (US);

Susan E. Eisen, Round Rock, TX (US);

Brandon Goddard, Kirkland, WA (US);

Jamory Hawkins, Austin, TX (US);

Dung Q. Nguyen, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3863 (2013.01); G06F 9/30116 (2013.01);
Abstract

A computer system, processor, and method for processing information is disclosed that includes reading out a plurality of entries in a history buffer prior to initiating a flush recovery process; initiating the flush recovery process; determining which of the history buffer entries read out of the history buffer should be recovered; and sending information associated with the history buffer entries to be recovered to one or more history buffer recovery ports. In one or more embodiments, the history buffer entries are continually read out in response to a processor and history buffer entries read out from the history buffer are directed to a specific history buffer recovery port associated with a mapper of a specific logical register.


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