The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2022

Filed:

Jul. 30, 2021
Applicant:

Marvell Asia Pte Ltd, Singapore, SG;

Inventor:

Rabin Sugumar, Sunnyvale, CA (US);

Assignee:

Marvell Asia Pte, Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 7/58 (2006.01); G06F 9/38 (2018.01); G06F 21/54 (2013.01);
U.S. Cl.
CPC ...
G06F 9/30181 (2013.01); G06F 7/588 (2013.01); G06F 9/3836 (2013.01); G06F 9/3867 (2013.01); G06F 21/54 (2013.01); G06F 9/30101 (2013.01);
Abstract

Described herein are systems and methods for introducing noise in threaded execution to mitigate cross-thread monitoring. For example, some systems include an integrated circuit including a processor pipeline that is configured to execute instructions using an architectural state of a processor core; data storage circuitry configured to store a thread identifier; and a random parameter generator. The integrated circuit may be configured to: determine a time for insertion based on a random parameter generated using the random parameter generator; at the time for insertion, insert one or more instructions in the processor pipeline by participating in thread arbitration using the thread identifier; and execute the one or more instructions using one or more execution units of the processor pipeline.


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