Semiconductor memory device

Abstract

A semiconductor memory device includes a substrate having a cell region and a contact region with a peripheral circuit region, first and second stacks on the cell region, and a first peripheral transistor on the peripheral circuit region. Each of the first and second stacks includes semiconductor patterns stacked, in a vertical direction, on the cell region, bit lines stacked in the vertical direction on the cell region and respectively connected to first ends of the semiconductor patterns, each of the bit lines extending, in a horizontal direction with respect to the upper surface of the substrate, from the cell region to the contact region, and a word line disposed adjacent to the semiconductor patterns and extending in the vertical direction from the cell region of the substrate. The first peripheral transistor is disposed between the bit lines of the first stack and the bit lines of the second stack.