The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 26, 2022
Filed:
May. 06, 2020
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Byoungsul Kim, Suwon-si, KR;
Hokyong Lee, Yongin-si, KR;
Hwajin Jung, Hwaseong-si, KR;
Yongjoo Choi, Hwaseong-si, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/20 (2006.01); G11C 29/44 (2006.01); G11C 29/34 (2006.01); G11C 29/14 (2006.01); G11C 7/10 (2006.01); G11C 29/12 (2006.01); G11C 29/18 (2006.01);
U.S. Cl.
CPC ...
G11C 29/44 (2013.01); G11C 7/1045 (2013.01); G11C 29/14 (2013.01); G11C 29/34 (2013.01); G11C 2029/1202 (2013.01); G11C 2029/1204 (2013.01); G11C 2029/1802 (2013.01);
Abstract
A method for testing a memory chip including: performing an electrical die sorting (EDS) test on the memory chip; performing a package test when the EDS test is passed; performing a module test when the package test is passed; performing a mounting test when the module test is passed; and setting the memory chip to a mirroring mode through a fusing operation when the EDS test, tire package test, tire module test or the mounting test is failed.