The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Dec. 13, 2018
Applicant:

No.24 Research Institute of China Electronics Technology Group Corporation, Chongqing, CN;

Inventors:

Ting Li, Chongqing, CN;

Gangyi Hu, Chongqing, CN;

Ruzhang Li, Chongqing, CN;

Yong Zhang, Chongqing, CN;

Zhengbo Huang, Chongqing, CN;

Yabo Ni, Chongqing, CN;

Xingfa Huang, Chongqing, CN;

Jian'an Wang, Chongqing, CN;

Guangbing Chen, Chongqing, CN;

Dongbing Fu, Chongqing, CN;

Jun Yuan, Chongqing, CN;

Zicheng Xu, Sichuan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03K 5/02 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H03M 1/06 (2013.01); H03K 5/02 (2013.01); H03K 17/6871 (2013.01);
Abstract

The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.


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