The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Aug. 07, 2019
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Chiemi Hashimoto, Tokyo, JP;

Kosuke Yayama, Tokyo, JP;

Tomokazu Matsuzaki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H03K 3/011 (2006.01); G01L 1/22 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H03K 3/011 (2013.01); G01L 1/2281 (2013.01); H01L 23/5228 (2013.01); H01L 28/20 (2013.01);
Abstract

The polysilicon resistance has a large resistance variation rate after the end of the mold packaging process. In order to enable high-precision trimming, it is desired to realize a resistance which is hardly affected by stress and temperature fluctuation generated in a substrate by a mold packaging process. A resistance element is formed in a plurality of wiring layers, and has a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and a repeating pattern of an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the interlayer conductive layer is formed of a plurality of types of materials.


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