The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2022
Filed:
Mar. 13, 2019
Applicant:
Dali Systems Co. Ltd., Grand Cayman, KY;
Inventor:
Wan Jong Kim, Port Moody, CA;
Assignee:
Dali Systems Co. Ltd., George Town, KY;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H03F 1/32 (2006.01); H04L 25/03 (2006.01); H04L 27/00 (2006.01); H03F 3/189 (2006.01); H03F 3/24 (2006.01); H04L 43/028 (2022.01); H04L 27/26 (2006.01);
U.S. Cl.
CPC ...
H03F 1/3247 (2013.01); H03F 1/3258 (2013.01); H03F 3/189 (2013.01); H03F 3/24 (2013.01); H03F 3/245 (2013.01); H04L 25/03063 (2013.01); H04L 27/0002 (2013.01); H04L 43/028 (2013.01); H03F 2200/336 (2013.01); H03F 2200/451 (2013.01); H04L 25/03343 (2013.01); H04L 27/2627 (2013.01); H04L 27/2655 (2013.01);
Abstract
A system for time aligning widely frequency spaced signals includes a digital predistortion (DPD) processor and a power amplifier coupled to the DPD processor and operable to provide a transmit signal at a power amplifier output. The system also includes a feedback loop coupled to the power amplifier output. The feedback loop comprises an adaptive fractional delay filter, a delay estimator coupled to the adaptive fractional delay filter, and a DPD coefficient estimator coupled to the delay estimator.