The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Oct. 19, 2020
Applicant:

Renesas Electronics America Inc., Milpitas, CA (US);

Inventors:

Pooja Agrawal, Milpitas, CA (US);

Adnan Dzebic, San Jose, CA (US);

Tao Qi, San Diego, CA (US);

Steve Jaycox, Sunnyvale, CA (US);

Chan Young Jeong, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 50/80 (2016.01); H02J 7/00 (2006.01); H02J 50/10 (2016.01);
U.S. Cl.
CPC ...
H02J 50/80 (2016.02); H02J 7/0071 (2020.01); H02J 50/10 (2016.02); H02J 2310/22 (2020.01);
Abstract

A method of over-current protection in a wireless power receiver operating in a high-power mode includes digitally receiving an output current signal, generating an OC INT signal if the output current signal is greater than a current limit value, and if the OC INT signal is generated, transmitting Count A number of End Power Transfer (EPT) packets. If wireless power transmission has not stopped, transmitting Count C number of Control Error Packets (CEPs) with Value B. If wireless power transmission has not reduced such that the output current IL is below the current limit value, then enabling an LDO current limit circuit in a power block of the wireless power receiver. In a low-power mode, the receiver enables a hardware over-current circuit that generates an OC INT signal when the output current exceeds a current limit.


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