The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Jan. 15, 2019
Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventors:

Tatsushi Kaneda, Osaka, JP;

Yoshisumi Kawabata, Osaka, JP;

So Tanaka, Osaka, JP;

Hirotaka Oomori, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/13 (2006.01); H01L 23/049 (2006.01); H01L 23/31 (2006.01); H01L 23/373 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/049 (2013.01); H01L 23/3121 (2013.01); H01L 23/3735 (2013.01); H01L 23/562 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A semiconductor device includes: a base plate having a first surface and having a first contact area in the first surface; a metal plate having a second surface, disposed such that the second surface faces the first surface, and having a second contact area in the second surface; a bonding material disposed between the first surface and the second surface and in contact with the first contact area and the second contact area to bond the metal plate and the base plate; an insulating plate disposed on the metal plate; a circuit member disposed on the insulating plate; a semiconductor element mounted to the circuit member; and a sealing material that covers the metal plate, the bonding material, the insulating plate, the circuit member, and the semiconductor element to seal a space above the base plate, wherein outside the second contact area, the second surface has a non-contact area that is not in contact with the bonding material, wherein on the base plate, a groove portion facing the non-contact area and surrounding the first contact area is provided, and wherein, in a plan view as viewed in a thickness direction of the base plate, an inner periphery of a corner portion of the groove portion has a first curve.


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