Secure boot hardware including hardware serial presence detection

Abstract

Techniques in electronic systems, such as in systems including a processing chip and one or more external memory chips, provide improvements in one or more of system security, performance, cost, and efficiency. For example, the processing chip includes one or more CPUs and circuitry enabling the CPUs to securely boot from an external, non-volatile memory chip containing encrypted, executable code. The circuitry comprises immutable hardware to hold the CPUs in a reset state while performing a serial presence detect on external interfaces of the processing chip and generating an address map according to results of the serial presence detect. In response to an initial instruction fetch of an initial one of the CPUs, the circuitry is able to return one or more instructions via the address map associating an address of the initial instruction fetch with one of the external memory chips.