The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Nov. 07, 2019
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Sandeep Razdan, Burlingame, CA (US);

Vipulkumar K. Patel, Breinigsville, PA (US);

Mark A. Webster, Bethlehem, PA (US);

Matthew J. Traverso, Santa Clara, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); G02B 6/12 (2006.01); G02B 6/122 (2006.01); G02B 6/30 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
G02B 6/1228 (2013.01); G02B 6/305 (2013.01); H01L 21/486 (2013.01); H01L 21/76243 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); G02B 2006/12085 (2013.01);
Abstract

Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.


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