The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Oct. 27, 2021
Applicants:

SK Hynix Inc., Icheon, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Hyojun Kim, Seoul, KR;

Deog-Kyoon Jeong, Seoul, KR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
H03L 7/093 (2013.01);
Abstract

A phase-locked loop includes a bias circuit controlling a first bias current between a first power source and a first node according to a bias control signal; an oscillation circuit coupled between the first node and a second power source and generating an oscillation signal according to a current from the first node; a duplicate bias circuit controlling a second bias current between the first power source and a second node according to the bias control signal; an equivalent impedance circuit coupled between the second node and the second power source; a comparator circuit comparing voltages of the first node and the second node; a first variable current circuit controlling a current between the first node and the second power source; and a second variable current circuit controlling a current between the second node and the second power source.


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