The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Dec. 18, 2019
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Geert Eneman, Heverlee, BE;

Bartlomiej Pawlak, Heverlee, BE;

Liesbeth Witters, Lubbeek, BE;

Geoffrey Pourtois, Villers-la-Ville, BE;

Assignee:

IMEC vzw, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 29/161 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66818 (2013.01); H01L 21/823431 (2013.01); H01L 21/845 (2013.01); H01L 29/161 (2013.01); H01L 29/785 (2013.01);
Abstract

According to one aspect, a method of fabricating a semiconductor structure includes cutting a semiconductor fin extending along a substrate. Cutting the semiconductor fin can comprise forming a fin cut mask. The fin cut mask can define a number of masked regions and a number of cut regions. The method can include cutting the fin into a number of fin parts by etching the fin in the cut regions. The method can further comprise forming an epitaxial semiconductor capping layer on the fin prior to forming the fin cut mask or on the fin parts subsequent to cutting the fin. A capping layer material and a fin material can be lattice mismatched. According to another aspect, a corresponding semiconductor structure comprises fin parts.


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