The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2022
Filed:
Jul. 17, 2020
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Tae Heui Kwon, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/08 (2006.01); G11C 16/30 (2006.01); G11C 16/34 (2006.01); G11C 16/24 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3459 (2013.01);
Abstract
A semiconductor memory apparatus may include a cell string and a page buffer. The cell string may include a drain select transistor coupled with a bit line, and memory cells coupled with the drain select transistor. The page buffer may be coupled to the cell string through the bit line. The page buffer may include a latch and a first current path. The latch may store data of a value indicative of a result of a threshold voltage verification on the drain select transistor. The first current path may set a voltage of the bit line to a program inhibit voltage, based on the value of the data stored in the latch.