The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Sep. 20, 2018
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventor:

Tetsuya Ueno, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G09G 3/3266 (2016.01); G09G 3/3283 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3283 (2013.01); G09G 2300/0439 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0233 (2013.01); G09G 2340/14 (2013.01);
Abstract

The present application discloses a current-driven display device capable of preventing a decrease in display quality due to luminance gradient caused by a voltage drop in a power supply line while preventing an increase in circuit and processing necessary for driving a pixel circuit. In an organic EL display device, a high-level power supply line ELVDD includes a trunk wire ELVand N branch wires ELVto ELVN diverging from the trunk wire ELVand arranged along the plurality of scanning signal lines Gto GN, respectively. A display control circuit determines estimated values of currents supplied from the power supply line to the respective pixel cicuits based on input image data, calculates a voltage drop ΔVn=V−Vn at a connection point between the trunk wire and the branch wire on each row during a data write period for the pixel circuits on the each row based on a current in the trunk wire calculated from the estimated values, and generates a driving image data signal Sdda to be provided to a data-side drive circuit by correcting the input image data so as to compensate for the voltage drop ΔVn.


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