The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2022
Filed:
Oct. 30, 2020
Xilinx, Inc., San Jose, CA (US);
Sonal Santan, San Jose, CA (US);
Ravi N. Kurlagunda, Fremont, CA (US);
Min Ma, San Jose, CA (US);
Himanshu Choudhary, Jodhpur, IN;
Manjunath Chepuri, Secundrabad, IN;
Cheng Zhen, Santa Clara, CA (US);
Pranjal Joshi, San Jose, CA (US);
Sebastian Turullols, Los Altos, CA (US);
Amit Kumar, Hyperabad, IN;
Kaustuv Manji, Hyderabad, IN;
Ravinder Sharma, Hyderabad, IN;
Ch Vamshi Krishna, Hyderabad, IN;
Xilinx, Inc., San Jose, CA (US);
Abstract
A hardware acceleration device can include a switch communicatively linked to a host central processing unit (CPU), an adapter coupled to the switch via a control bus, wherein the control bus is configured to convey addresses of descriptors from the host central CPU to the adapter, and a random-access memory (RAM) coupled to the switch through a data bus. The RAM is configured to store descriptors received from the host CPU via the data bus. The hardware acceleration device can include a compute unit coupled to the adapter and configured to perform operations specified by the descriptors. The adapter may be configured to retrieve the descriptors from the RAM via the data bus, provide arguments from the descriptors to the compute unit, and provide control signals to the compute unit to initiate the operations using the arguments.