The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2022
Filed:
Aug. 01, 2018
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Sai Rahul Chalamalasetti, Palo Alto, CA (US);
Paolo Faraboschi, Palo Alto, CA (US);
Martin Foltin, Ft. Collins, CO (US);
Catherine Graves, Palo Alto, CA (US);
Dejan S. Milojicic, Palo Alto, CA (US);
Sergey Serebryakov, Palo Alto, CA (US);
John Paul Strachan, Palo Alto, CA (US);
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Abstract
Disclosed techniques provide for dynamically changing precision of a multi-stage compute process. For example, changing neural network (NN) parameters on a per-layer basis depending on properties of incoming data streams and per-layer performance of an NN among other considerations. NNs include multiple layers that may each be calculated with a different degree of accuracy and therefore, compute resource overhead (e.g., memory, processor resources, etc.). NNs are usually trained with 32-bit or 16-bit floating-point numbers. Once trained, an NN may be deployed in production. One approach to reduce compute overhead is to reduce parameter precision of NNs to 16 or 8 for deployment. The conversion to an acceptable lower precision is usually determined manually before deployment and precision levels are fixed while deployed. Disclosed techniques and implementations address automatic rather than manual determination or precision levels for different stages and dynamically adjusting precision for each stage at run-time.