The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2022
Filed:
Dec. 17, 2020
Applicant:
Kioxia Corporation, Tokyo, JP;
Inventors:
Kensuke Yamamoto, Yokohama Kanagawa, JP;
Kosuke Yanagidaira, Fujisawa Kanagawa, JP;
Assignee:
KIOXIA CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 25/02 (2006.01); G11C 29/02 (2006.01); G11C 11/4093 (2006.01); G11C 7/10 (2006.01); G11C 11/16 (2006.01); G11C 11/409 (2006.01); H03K 19/00 (2006.01); H03K 19/17764 (2020.01);
U.S. Cl.
CPC ...
H04L 25/0278 (2013.01); G11C 7/1057 (2013.01); G11C 11/1673 (2013.01); G11C 11/409 (2013.01); G11C 11/4093 (2013.01); G11C 29/022 (2013.01); G11C 29/028 (2013.01); H03K 19/0005 (2013.01); H03K 19/17764 (2013.01); G11C 2207/105 (2013.01); G11C 2207/2254 (2013.01);
Abstract
A semiconductor device includes a first chip and a second chip. The first chip includes a first circuit having a first output terminal. The second chip includes a second circuit having a second output terminal, which is electrically connected to the first output terminal via a first signal line. When the first chip and the second chip receive a first command, the second circuit calibrates an output impedance at the second output terminal through a first calibration operation based on an output impedance at the first output terminal.