The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Oct. 24, 2017
Applicant:

Hitachi, Ltd., Tokyo, JP;

Inventors:

Masahiro Masunaga, Tokyo, JP;

Shintaroh Sato, Tokyo, JP;

Akio Shima, Tokyo, JP;

Digh Hisamoto, Tokyo, JP;

Assignee:

HITACHI, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 21/02 (2006.01); H01L 23/49 (2006.01); H01L 27/02 (2006.01); H01L 21/82 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 27/092 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/36 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1608 (2013.01); H01L 21/02378 (2013.01); H01L 21/02529 (2013.01); H01L 21/02634 (2013.01); H01L 21/8213 (2013.01); H01L 23/49838 (2013.01); H01L 24/32 (2013.01); H01L 27/0207 (2013.01); H01L 27/0922 (2013.01); H01L 29/0847 (2013.01); H01L 29/1095 (2013.01); H01L 29/36 (2013.01); H01L 29/41758 (2013.01); H01L 29/66068 (2013.01); H01L 2224/32225 (2013.01);
Abstract

The purpose of the present invention is to provide a semiconductor device comprising an epitaxial layer formed on a SiC substrate, and a CMOS formed in the top part of the epitaxial layer, wherein growth of any defects present at the interface between the SiC substrate and the epitaxial layer is suppressed, and the reliability of the semiconductor device is improved. As a means to achieve the foregoing, a semiconductor device is formed such that the distance from a p-type diffusion layer to the interface between an n-type epitaxial layer and an n-type semiconductor substrate is larger than the thickness of a depletion layer that extends from the p-type diffusion layer to the back side of the n-type semiconductor substrate in response to the potential difference between a substrate electrode and another substrate electrode.


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