The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Jan. 18, 2018
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Yuji Ibusuki, Kagoshima, JP;

Daisaku Okamoto, Kagoshima, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/02 (2006.01); H01L 21/84 (2006.01); H01L 23/66 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1203 (2013.01); H01L 21/02236 (2013.01); H01L 21/84 (2013.01); H01L 23/66 (2013.01); H01L 29/0657 (2013.01); H01L 29/4238 (2013.01); H01L 29/45 (2013.01);
Abstract

To provide a semiconductor device capable of reducing a parasitic capacitance, securing high reliability, and suppressing an increase in manufacturing cost. A semiconductor device is provided which includes a substrate including an embedded insulation film and a semiconductor layer on the embedded insulation film and on which a semiconductor element is formed and a gate electrode on the semiconductor layer, in which the gate electrode includes a band-shaped first electrode portion that extends from a center portion of the semiconductor layer and beyond an end of the semiconductor layer along a first direction in a case where the substrate is viewed from above, and in a cross section in a case where the first electrode portion and the substrate are cut along the first direction, a film thickness of the end of the semiconductor layer is thicker than a film thickness of the center portion of the semiconductor layer.


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