The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2022

Filed:

Sep. 08, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Makoto Hirano, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0026 (2013.01); G11C 13/0007 (2013.01); G11C 13/0014 (2013.01); G11C 13/0028 (2013.01); G11C 2213/79 (2013.01);
Abstract

A resistive memory device includes a first bit line group including a first edge bit line, a second bit line group including a second edge bit line, and a first boundary transistor configured to apply a non-selection voltage to the second edge bit line according to a selection of the first edge bit line. The first edge bit line of the first bit line group is disposed closest to the second bit line group, and the second edge bit line of the second bit line group is disposed closest to the first bit line group.


Find Patent Forward Citations

Hirano, Makoto. (2022). Resistive memory device with boundary and edge transistors coupled to edge bit lines (U.S. Patent No. 11380392). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11380392

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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