The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Apr. 01, 2020
Applicant:

Shanghai Huali Microelectronics Corporation, Shanghai, CN;

Inventors:

Pengkai Xu, Shanghai, CN;

Fulong Qiao, Shanghai, CN;

Yi Wang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 27/11524 (2017.01); H01L 27/11529 (2017.01); H01L 27/1157 (2017.01); H01L 21/28 (2006.01); H01L 27/11539 (2017.01); H01L 27/11541 (2017.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42328 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11539 (2013.01); H01L 27/11541 (2013.01); H01L 29/40114 (2019.08); H01L 29/66825 (2013.01); H01L 29/788 (2013.01);
Abstract

A method for forming the gate structure of the NAND memory, comprising the steps of disposing a gate structure layer, a pattern transfer layer, a TEOS structure, and an organic dielectric Tri-Layer on a substrate sequentially; performing a patterning using a first photomask and a first photoresist layer; performing an etching process to form a control gate structure, a peripheral gate structure and a select gate structure; performing a trimming process to them; patterning sidewalls on sides of them; performing a second patterning using a second photomask as a mask and a second photoresist layer to protect the peripheral gate structure, the select gate structure, and their sidewalls; removing the control gate structure between its sidewalls; performing etching by using the sidewalls, the peripheral gate structure and the select gate structure as masks to form the control gate, the peripheral gate, and the select gate.


Find Patent Forward Citations

Loading…