The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Jul. 07, 2020
Applicant:

Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;

Inventor:

Chun-Chi Lai, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76892 (2013.01); H01L 21/76828 (2013.01); H01L 21/76834 (2013.01); H01L 21/76895 (2013.01);
Abstract

A manufacturing method of a semiconductor device is provided. A substrate is provided. The substrate has an active area. A plurality of word lines are formed on the substrate. Each of the word lines is extended along a first direction, and the word lines are arranged on both sides of the active area along a second direction. A first dielectric layer is formed on the substrate. The first dielectric layer covers the active area and the word lines. A contact is formed on the active area. The contact penetrates through the first dielectric layer and is electrically connected to the active area. A heating process is performed on the first dielectric layer to shrink the first dielectric layer inward, and the contact is correspondingly expanded outward.


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