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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11373899 B1

PDFFull Text
Date of Patent:
Jun. 28, 2022

Filed:

Mar. 04, 2020

Pattern generation device, pattern generation method, and method of manufacturing semiconductor device

Applicant:

Kioxia Corporation, Minato-ku, JP;

Inventors:

Taiki Kimura, Kawasaki, JP;

Tetsuaki Matsunawa, Fujisawa, JP;

Assignee:

Kioxia Corporation, Minato-ku, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Hrayr A Sayadian

Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/768 (2006.01); G03F 7/20 (2006.01); H01L 29/78 (2006.01); G06F 30/392 (2020.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); G03F 7/70616 (2013.01); G06F 30/392 (2020.01); H01L 21/76898 (2013.01); H01L 27/0207 (2013.01); H01L 29/7845 (2013.01);
Abstract

According to the present embodiment, the pattern generation device includes a misalignment value calculation unit configured to acquire a layout information, calculate a layout function from the layout information, and calculate a misalignment value by a convolution of the layout function and an integral kernel having a predetermined parameter, and a pattern correction unit configured to correct a pattern to generate a modified layout information using a calculated result by the misalignment value calculation unit, and output the modified layout information.

Find Patent Forward Citations

Kimura, Taiki. (2022). Pattern generation device, pattern generation method, and method of manufacturing semiconductor device (U.S. Patent No. 11373899). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11373899

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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