The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Apr. 07, 2021
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Yoshiyuki Kurokawa, Sagamihara, JP;

Takayuki Ikeda, Atsugi, JP;

Tatsunori Inoue, Atsugi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G11C 19/18 (2006.01); G06N 3/04 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); G11C 27/04 (2006.01); G11C 27/02 (2006.01); G06N 3/08 (2006.01); G06N 3/063 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3674 (2013.01); G06N 3/0454 (2013.01); G06N 3/0481 (2013.01); G06N 3/063 (2013.01); G06N 3/084 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G11C 19/184 (2013.01); G11C 27/024 (2013.01); G11C 27/04 (2013.01); H01L 27/1225 (2013.01); H01L 27/1251 (2013.01); H01L 29/7869 (2013.01); H01L 29/78648 (2013.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/0294 (2013.01); G09G 2310/0297 (2013.01);
Abstract

A semiconductor device with a small circuit area that consumes low power is provided. The semiconductor device includes a shift register, a sample-and-hold circuit, a first buffer circuit, and a second buffer circuit. The sample-and-hold circuit includes a first input terminal, a second input terminal, and an output terminal. An output terminal of the first buffer circuit is electrically connected to the first input terminal. The shift register is electrically connected to the second input terminal. An input terminal of the second buffer circuit is electrically connected to the output terminal of the sample-and-hold circuit. In the semiconductor device, the potential of an input analog signal is retained in the sample-and-hold circuit and the analog signal is output from an output terminal of the second buffer circuit.


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