The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Jul. 02, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yasuyuki Imaizumi, Yokohama Kanagawa, JP;

Tokumasa Hara, Kawasaki Kanagawa, JP;

Toshiyuki Yamagishi, Tokyo, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 3/06 (2006.01); H03M 13/29 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); H03M 13/2906 (2013.01);
Abstract

A memory system includes a non-volatile memory including at least one memory cell, a buffer, and a memory controller. The memory controller acquires first data from the buffer. The first data includes a plurality of bits of data. The memory controller generates second data by performing a randomization process on the first data, generates a flag that is information used to identify an error suppression encoding process, based on the second data, and stores the flag in the buffer. The memory controller acquires third data and the flag from the buffer. The third data is 1-bit data of the first data. The memory controller generates storage data by performing the error suppression encoding process based on the acquired flag and the randomization process on the third data, and writes the storage data into the memory cell.


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