The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2022

Filed:

Dec. 16, 2020
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;

Inventors:

Shunpei Yamazaki, Tokyo, JP;

Yoshiharu Hirakata, Kanagawa, JP;

Tetsuji Ishitani, Kanagawa, JP;

Daisuke Kubota, Kanagawa, JP;

Ryo Hatsumi, Kanagawa, JP;

Masaru Nakano, Kanagawa, JP;

Takashi Hamada, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1333 (2006.01);
U.S. Cl.
CPC ...
G02F 1/133345 (2013.01);
Abstract

A display device including a peripheral circuit portion with high operation stability. The display device includes a first substrate and a second substrate. A first insulating layer is on a first plane of the first substrate, and a second insulating layer is on a first plane of the second substrate. An area of the first plane of the first substrate is the same as an area of the first plane of the second substrate. The first plane of the first substrate and the first plane of the second substrate face each other. A bonding layer is between the first insulating layer and the second insulating layer. A protection film is in contact with the first substrate, the first insulating layer, the bonding layer, the second insulating layer, and the second substrate.


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