The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2022

Filed:

Apr. 30, 2021
Applicant:

Alpha and Omega Semiconductor International Lp, Toronto, CA;

Inventors:

Richard Schmitz, San Tan Valley, AZ (US);

Tsing Hsu, Dallas, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/125 (2006.01); H03K 5/1252 (2006.01); H04B 15/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1252 (2013.01); H04B 15/00 (2013.01);
Abstract

Apparatus and associated methods relate to a power supply noise disturbance rejection circuit (NDRC) having a first circuit reference potential (CRP), a second circuit reference potential (CRP), and a galvanic link conductively connecting CRPand CRPand providing a non-zero resistance return path for at least one current mode signal (CMS). In an illustrative example, a power supply monitor circuit (PSMC) may be referenced to CRPand a control circuit to CRP. The PMSC may, for example, generate a voltage mode signal (VMS) relative to CRPand representing an output parameter of a power supply circuit (PSC), and convert the VMS into a first CMS (CMS). The control circuit may, for example, generate a control signal for the PSC from CMS. Various embodiments may advantageously attenuate a noise margin of a CMS presented at the control circuit by a factor of at least 10 relative to an equivalent VMS.


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