The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2022

Filed:

Jan. 09, 2020
Applicant:

Inphi Corporation, Santa Clara, CA (US);

Inventors:

Liang Ding, Westlake Village, CA (US);

Radhakrishnan L. Nagarajan, Santa Clara, CA (US);

Assignee:

MARVELL ASIA PTE LTD., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01K 3/10 (2006.01); H01R 43/00 (2006.01); H01L 23/34 (2006.01); H01L 23/48 (2006.01); H01L 21/00 (2006.01); H01L 23/538 (2006.01); G02B 6/42 (2006.01); H01L 25/16 (2006.01); H01L 23/00 (2006.01); G02B 6/12 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); G02B 6/428 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 25/167 (2013.01); G02B 2006/12061 (2013.01); H01L 21/768 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/14 (2013.01); H01L 2924/157 (2013.01);
Abstract

A method for forming a silicon photonics interposer having through-silicon vias (TSVs). The method includes forming vias in a front side of a silicon substrate and defining primary structures for forming optical devices in the front side. Additionally, the method includes bonding a first handle wafer to the front side and thinning down the silicon substrate from the back side and forming bumps at the back side to couple with a conductive material in the vias. Furthermore, the method includes bonding a second handle wafer to the back side and debonding the first handle wafer from the front side to form secondary structures based on the primary structures. Moreover, the method includes forming pads at the front side to couple with the bumps at the back side before completing final structures based on the secondary structures and debonding the second handle wafer from the back side.


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