The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Oct. 10, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jinsu Heo, Suwon-si, KR;

Seungtae Ko, Suwon-si, KR;

Sangho Lim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H04B 1/40 (2015.01);
U.S. Cl.
CPC ...
H04B 1/40 (2013.01); H05K 1/025 (2013.01); H05K 1/0219 (2013.01); H05K 1/0298 (2013.01); H05K 1/0243 (2013.01); H05K 1/0251 (2013.01); H05K 2201/0715 (2013.01); H05K 2201/0979 (2013.01); H05K 2201/09618 (2013.01); H05K 2201/09672 (2013.01); H05K 2201/10098 (2013.01);
Abstract

A multilayer printed circuit board (PCB) including a plurality of substrate layers formed in stack is provided. The multilayer printed circuit board includes a first substrate layer located on an outer side of the plurality of substrate layers, and a second substrate layer located on another outer side of the plurality of substrate layers that is opposite to the first substrate layer. The multilayer printed circuit board further includes a transmission line, connecting a first point of the first substrate layer and a second point of the second substrate layer, which passes through the first and second substrate layers, and includes a sub-transmission line disposed between and extended along at least two adjacent substrate layers among the plurality of substrate layers.


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