The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2022
Filed:
Sep. 14, 2021
Analog Power Conversion Llc, Bend, OR (US);
Kyosan Electric Manufacturing Co., Ltd., Yokohama, JP;
Sam Seiichiro Ochi, Lakewood Ranch, FL (US);
Tetsuya Takata, Yokohama, JP;
Itsuo Yuzurihara, Yokohama, JP;
Tomohiro Yoneyama, Yokohama, JP;
Yu Hosoyamada, Yokohama, JP;
Analog Power Conversion LLC, Bend, OR (US);
Kyosan Electric Manufacturing Co., Ltd., Yokohama, JP;
Abstract
A control signal may be produced in response to an assertion of a switch signal by asserting the control signal, waiting an adaptive delay after the assertion of the switch signal, de-asserting the control signal in response to the expiration of the adaptive delay, and re-asserting the control signal in response to a current generated according to the control signal becoming zero. The adaptive delay may be adjusted according to a voltage generated using the current. A circuit may include an XOR gate producing the control signal from a switch signal and an output of a Set-Reset Flip-Flop (SRFF), a zero-detect circuit that resets the SRFF when a current generated using the control circuit becomes zero, and a delay circuit to set the SRFF an adaptive delay after assertion of the switch signal and to adjust the adaptive delay according to a voltage generated by the current.