The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Jul. 02, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byounggon Kang, Seoul, KR;

Changbeom Kim, Tongyeong-si, KR;

Dalhee Lee, Seoul, KR;

Eun-Hee Choi, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 27/02 (2006.01); H01L 27/118 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/0207 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01); H01L 27/11807 (2013.01); H01L 29/7853 (2013.01); H01L 29/42392 (2013.01); H01L 2027/11864 (2013.01); H01L 2027/11866 (2013.01);
Abstract

A semiconductor device includes a first gate electrode disposed on a substrate and extending in a first horizontal direction, a first gate contact and a dummy gate contact, which are spaced apart from each other in the first horizontal direction and are in contact with a top surface of the first gate electrode, a first interconnect line extending in a second horizontal direction and overlapping the first gate contact in a vertical direction with respect to the upper surface of the substrate, and a voltage generator configured to generate a first voltage and apply the first voltage to the first gate electrode via the first interconnect line and the first gate contact. The first gate electrode receives the first voltage via the first interconnect line and the first gate contact from the voltage generator. The dummy gate contact receives the first voltage via the first gate electrode.


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