The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2022

Filed:

Feb. 03, 2021
Applicant:

Ambarella International Lp, Santa Clara, CA (US);

Inventors:

Manish Singh, Campbell, CA (US);

Dingxin Jin, Milpitas, CA (US);

Assignee:

Ambarella International LP, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/06 (2006.01); G06F 13/40 (2006.01); G11C 11/401 (2006.01);
U.S. Cl.
CPC ...
G06F 12/06 (2013.01); G06F 13/4022 (2013.01); G06F 2212/1016 (2013.01); G11C 11/401 (2013.01);
Abstract

An apparatus including a plurality of page circuits and a common request circuit. The page circuits may each be implemented within a respective memory bank controller of a memory bank set and store an address and determine a page hit status. The common request circuit may be implemented within the memory bank set and store client requests and issue a command corresponding to the client requests in response to the page hit status and an order of storage of the client requests. The page circuits may comprise half a storage depth of the common request circuit. The common request circuit may be shared between each of the memory bank controllers of the memory bank set. The memory bank controllers may control access to a random access memory. The address, the client requests and the page hit status may enable buffering to provide a preview of upcoming client requests.


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