The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2022
Filed:
Dec. 25, 2019
Applicants:
Ordos Yuansheng Optoelectronics Co., Ltd., Inner Mongolia, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Inventor:
Dan Jia, Beijing, CN;
Assignees:
ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., Inner Mongolia, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); H01L 21/66 (2006.01); H01L 23/60 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136204 (2013.01); G02F 1/136286 (2013.01); H01L 22/32 (2013.01); H01L 23/60 (2013.01); H01L 27/1244 (2013.01); G02F 1/136254 (2021.01);
Abstract
An array substrate motherboard includes a plurality of array substrates and a plurality of connection lines. Each of the plurality of array substrates includes an electrical test region, and the electrical test region includes a first conductive terminal. The plurality of connection lines are electrically connected to first conductive terminals of electrical test regions of the plurality of array substrates to electrically connect the plurality of array substrates together.