The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2022

Filed:

Oct. 23, 2020
Applicant:

Realtek Semiconductor Corp., HsinChu, TW;

Inventors:

Hsuan-Ting Ho, Taichung, TW;

Liang-Wei Huang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/23 (2006.01); H04B 3/20 (2006.01); H03M 1/12 (2006.01); H04L 5/14 (2006.01); H04B 1/40 (2015.01); H03K 5/01 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H04B 3/20 (2013.01); H03K 5/01 (2013.01); H03M 1/12 (2013.01); H04B 1/40 (2013.01); H04L 5/1461 (2013.01); H03K 2005/00286 (2013.01);
Abstract

A transceiver circuit includes an ADC and an echo-cancellation circuit, wherein the echo-cancellation circuit includes a steady circuit, a transient circuit and an output circuit. In the operations of the transceiver circuit, the ADC is configured to perform an analog-to-digital conversion operation on an analog input signal to generate a digital input signal. The steady circuit is configured to generate a steady echo response according to a transmitting signal. The transient circuit is configured to generate an echo response adjustment signal according to a phase change of a clock signal used by the transmitting signal. The output circuit is configured to generate an output signal according to the digital input signal, the steady echo response, and the echo response adjustment signal.


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